1. Field of the Invention
This invention relates to a semiconductor integrated circuit device and a method of manufacturing the same.
2. Prior Art
In auxiliary type insulating gate type transistor circuits used in ULSI, which is currently a typical semiconductor integrated circuit device, due to the construction of the circuit or system, it is required to form insulating gate type transistor elements having different threshold voltages (Vth) on one silicon semiconductor substrate or semiconductor chip. In the prior art, to vary the threshold values of these transistors, the dependence of the threshold values on impurity concentration was mainly used. For example, in a gradual channel approximation, the threshold value (Vth) may be expressed as a parameter of the impurity concentration (Na) forming a channel, i.e.,
 Vth=Φms+2ΦF+(2εs·ε0·q·Na·(Vbs+2ΦF))1/2·Cox−1  [Eqn. 1]
Herein, Φ ms is a work function difference between the gate electrode material and silicon channel, ΦF is the silicon channel Fermi level, εs, ε0 are, respectively, the relative dielectric constant of silicon and the dielectric constant of a vacuum, q is the charge on the electron, Vbs is a source-substrate bias, and Cox is a gate insulating film capacity.
Using the ion implantation method, semiconductor regions of different impurity concentrations (depending on which elements they are used for) are formed on the same chip. Hence, it is possible to integrate elements having threshold values of different capacities, which is one of the features of LSI using MIS transistors.
However, now that elements are becoming more detailed, the problem of leak current has arisen due to short channel effects, as typified by punch through between source and drain. To suppress this leak current, the impurity concentration of the substrate must be increased to create a potential blocking layer, but this starts to conflict with the substrate impurity concentration calculated from Eqn. 1 for setting the threshold value. In other words, there is a severe restriction on the setting of the substrate impurity concentration to satisfy the dual objects of punch through and desired threshold voltage value (Vth).
Further, in the low power consumption, high speed large-scale semiconductor integrated circuit devices which are expected to be developed in the future, the Inventor considered that a new technique would be necessary to control transistor threshold voltage values (Vth) precisely to an order of approximately 0.1V (with a scatter within about ±10 mV), in view of the fact that the source voltage Vdd to operate these devices will be 1V or less.
The Inventor noted a serious problem in that when a Silicon-On-Insulator (Sol) substrate is used, which is effective in suppressing short channel effects, as the silicon layer forming the channel is extremely thin, it was very difficult to vary the threshold value (Vth) by controlling the impurity amount in this part.